This book describes the most frequently used high-speed serial buses in embedded systems, especially those used by FPGAs. These buses employ SerDes, JESD204, SRIO, PCIE, Aurora and SATA protocols for chip-to-chip and board-to-board communication, and CPCIE, VPX, FC and Infiniband protocols for inter-chassis communication. For each type, the book provides the bus history and version info, while also assessing its advantages and limitations. Furthermore, it offers a detailed guide to implementing these buses in FPGA design, from the physical layer and link synchronization to the frame format and application command. Given its scope, the book offers a valuable resource for researchers, R&D engineers and graduate students in computer science or electronics who wish to learn the protocol principles, structures and applications of high-speed serial buses.

Dr. Zhang Feng is a Senior Engineer. His research areas include data recording systems such as CCD, SATA, SRIO, FC and CPCIE, as well as the design of embedded systems used in wireless communication, including SerDes, JESD204, Aurora, and VPX.

The History and Development of Bus.- The High-Speed Data Transfer based on SERDES.- ADC/DAC Data Transfer Based on JESD204 Protocol.- The High-speed Communication Architecture in SRIO.- The High-speed Data Transfer based on PCIE.- The High-speed Data Transfer based on Aurora.- A High-speed Data Recording Scheme based on SATA Protocol.- The Communication Structure of CompactPCI Express.- The Communication Structure of VPX.- The Implementation and Application of FC Protocol.- The Implementation and Application of Infiniband Protocol.- Appendixes.