Manar El-Chammas received his Ph.D. from Stanford University in 2010, where his research focused on multi-GS/s time-interleaved ADCs.  He joined Texas Instruments in 2010, where he worked on high-speed and high-performance ADCs for wireless infrastructure, and was the design manager of the High Speed Data Converter group.  He later joined Mythic as the Director of Analog Design, where he led the development of the core analog computation engine for neural networks.  Afterwards, he worked at an early stage startup architecting novel artificial intelligence inference systems.  He then joined Omni Design Technologies, and is currently SVP of Engineering focused on ultra-high speed data converter architectures. He has been granted multiple patents in high-speed ADC design and mixed-signal computation, has published and presented a variety of journal and conference articles (and was the recipient of the best paper award at IEEE BCTM), and has written a book on time-interleaved ADCs.. His research interests include highly linear sampling systems, ultra-low power data converter design, and efficient computation systems for machine learning. 

Introduction.- History of pipelined ADCs.- Pipelined ADC Architectures.- Sampling networks.- High performance amplifiers.- Comparator design.- Reference amplifier design.- Niche architectures.- Use of calibration.- Conclusion.

This book discusses the theoretical foundations and design techniques needed to effectively design high-speed (multi-GS/s) and high-performance pipelined ADCs, which play a critical role in the signal chain of various systems. Readers will be walked through the design and analysis of pipelined ADCs and their topologies, and will learn both theoretical and practical design details that will enable them to explore and build these data converters. The author also presents details on various aspects of pipelined ADCs and their impact on the ADC speed and performance, with a focus on the input buffer and sampling network, the reference amplifier, comparators and their impact on ADC error rate and high-frequency performance, and mismatch estimation and correction.